Microprocessor
Q1. A microprocessor is the heart of the microcomputer.
a) Receiving input b)
Performing computations.
c) Storing data &
instructions d) All of the above.
Q2. A device, which enables a microcomputer to perform the first of the
above mentioned tasks is known as the input device.
a) Keyboard b) Mouse c)
Toggle d) All of the above.
Q3.The task of displaying the result computed by the microprocessor is
performed by an output device, some of the commonly used output device.
a) Cathode Ray Tube(CRT) b)
Light-Emitting diodes(LED’S)
c) Laser printer d) All of the above.
Q4.An instruction essentially consists of an
a) Operation code b)
Address of the data
c) Instruction operates d) None
of the above.
Q5. The SO85A has interrupt pins :-
a) TRAP, RST7.5 b)
RST6.5, RST5.5
c) TNTR(pin 10) d) All of the above.
Q6. 8085A has 8 unidirectional signal lines :-
a)MSB b) HOLB,HALT c) RESET mode d)
None of the above.
Q7. The clock(CLK) signal is derived from the on chip oscillator :-
a) CLK derives b) Peripherals to Synchronize c)Timing
d) All of the above.
Q8. Every microprocessor is provided with a set of registers :
a) Temporary storage b) Instruction Execution c) None of the above.
Q9. Registers available for temporary storage of operands or address
affects the following :-
a)
Memory space occupied by the program.
b)
Time of execution of the program.
c)
Ease of programming.
d) All of the above.
Q10.The registers available to t he user can be further classified into
:-
a) General purpose
register b) Special
purpose register c) All of the above.
Q11. In 8085A microprocessor, the data size is 8-bit and address size is
16-bit.
a) B-C pair b) D-E pair c) H-L pair d) All of the above.
Q12. Set of registers provided for some special applications.
a) Accumulator b) Memory space c) None of the
above.
Q13. A microprocessor to execute a program, the CPU has to do the
following operations:
a) Fetch the opcode b)
Read a memory location for the data.
c) Perform the required
operation d) All of the above.
Q14. An instruction cycle can be defined as the sum of an instruction
fetch time and the instruction execute time.
a) Instruction cycle=Instruction fetch
+ Instruction execute.
b)
Memory location and deposited in the CPU’s
c)
None of the above.
Q15. 8085 has 5 addressing mode and are :-
a) Immediate, inherent b) Direct c)
Register and register indirect
d) All of the above.
Q16. The microprocessor selects the peripheral through
Transmit
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Receive
IOW
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a) Read select b) Write select c) Chip select d)
None of the above.
Q17. One of the following addressing modes is not possible in 8085.
a) Indexed addressing b)
Indirect addressing
c) Direct addressing d)
Indirect register address.
Q18. 8085 has
a) One 16-bit register b) Two 16-bit
register
c) Three 16-bit register d) Four 16-bit register.
Q19. The speed of a microprocessor is usually measured by the
a)
Microprocessor’s throughput.
b)
Speed with which it performs I/P and O/P operations.
c) Time required to execute a basic
instruction.
d)
Time required to process a small operation.
Q20.16-bit microprocessors usually have :
a)
Only one stack pointer register.
b) Two stack pointer registers.
c)
More stack
pointer registers.
d)
None of the above.
Q21. The microprocessor finished information the 8251.
a) Mode b) Baud bit c) Stop rate d) All of the above.
Q22. 8252 A must check whether the
I/O devices are ready by reading the status register.
a)
Mode instruction (Word)
b) Command instruction (word)
c)
None of the above.
Q23. The 8279 is a 40 pin device
with 2 major segment :-
a) Keyboard and display b) Segment c) None of the above.
Q24. 8279 can be divided into 4 major sections :
a) Keyboard section b)
Display, Microprocessor interface section
c) Scan section d) All of the above.
Q25. Keyboard section has 8 lines, 8 columns and can operates in 2 modes
:
a) 2 key lockout b) N-key rollover c) All of the above.
Q26. 8255 is one of the widely used programmable :
a) Port A,B,C b)
Cupper Clower
c) Mode 0, 1, 2 d) All of the above.
Q27. Interrupts can also be masked and unmasked.
a) Setting/Resetting b) Flip/Flop c) None of the above.
Q28. Interrupts can be generally classified :
a) Hardware interrupts b) Software interrupts c) All of the above.
Q29. 8085 microprocessor has 5 hardware interrupts :
a) TRAP, RST6.5 b) RST7.5,RST5.5
c) INTR d)
None of the above.
Q30. To check if RST 7.5 is masked or not
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SID
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17.5
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16.5
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15.5
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IE
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M7.5
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M6.5
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M5.5
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0
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0
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0
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0
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I
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I
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0
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I
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a)
RIM= read interrupt mask.
b)
ANI 04 H= mast all bits except RST 7.5
c)
JNZ unmask=jump if not zero to unmask.
d)
All of the above.
Q31. Reset the 7.5 interrupts
a)
MVIA 18 =
set D4 = 1
b)
SIM =
reset7.5 interrupt flip-flop.
c)
Enable RST 7.5, 6.5, 5.5
Ans. (a) a, c (b) b, c (c) a, b d)
None of the above.
Q32. The
data which a microprocessor needs to process, comes from devices such as a
keyboard.
a)Switch b) Analog-to-digital c)
Digital-to-analog d) All of the above.
Q33. The
data from the keyboard and are :
a) Detect a closed key b)
Bounce the closed key.
c) Code the closed key d) None of the above.
Q34.
Memory interfacing, able to read from and write into a given register of a
memory chip.
a) Select the chip b)
Identify the register
c) Enable the appropriate buffer. d) All of the above.
Q35.In an
input port is used to read data from an input device such as keyboard is
called.
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D0-D7 Data
from input
Data Bus device(Keyboard)
a) Two-state buffer b) Tri-state buffer c) None of the above.
Q36. An
output part is used to send data to the output device unit from the
microprocessor’s called.
a) Decoder b) Sinking 24 MA c) Latch d) None of the above.
Q37. The
data bus of a microcomputer system is bi-directional.
a) Buffer allow data in both
direction.
b)
Buffer enable signal (G)
c)
Buffer decode logic circuit.
d)
None of the above.
Q38. The encoder is a logic circuit that provides the appropriate code
(binary BCD) :-
a) Input signal b)
Reverse of decoding
c) Priority encoders d) All of the above.
Q39. A latch is a D flip-flop is also called a transparent latch.
a) Positive-edge-triggered.
b)
Positive-edge-clock
c)
Tri-state buffers.
d)
None of the above.
Q40. The microprocessor (MPU) primarily performs four operation
a) Memory read, write b) I/O read, I/O
write
c) Appropriate control
signal d) Transfer data
Ans. (i) c, d, both (ii)
b, d, both (iii) a, b, both
Q41. A group of bi-directional lines used to transfer data.
a) Address Bus b) Control Bus c) Data Bus d) None of the above.
Q42. The 8085 can respond to four externally initiated operation.
a) Reset, Interrupt b)
Ready hold
c) Memory-mapped I/O d) Memory chip
Ans. (i) c, d, both (ii) a, b, both (iii)
None of the above.
Q43. To interconnect peripherals with the 8085 MPU, additional logic
circuit, called interfacing devices. These circuits includes device such as
a) buffer b) Decoder c) Encoder, latches d) All of the above.
Q44. The 8085 flag register has five flag.
1) Carry flag, Sign flag 2) Zero flag, Parity flag 3) Auxilliary Carry
Ans. (i) 1, 2
both (ii) 1, 3
both (iii) All of the
above.
Q45. Counters and time delays can be designed using .
a) Software b) CPI c)
Instruction d)All of the
above.
Q46. The 8085 code can be
assembled by using a program called a :
a) Cross-assembler b)
Cross-compiler
c) Cross-interpret d)
All of the above.
Q47. The 8085 microprocessor has two pins available for I/O
communication.
(1) HOLD, HOLDA (2) HOLDAB, HOLDB
Ans. (i) 1, 2 both (ii) 1 only (iii)
2 only.
Q48. The interrupt is an asynchronous process of communication with the
microprocessor initiated by an :
a) External peripheral b)
Non vectored interrupt c) None
of the above.
Q49. The instruction SIM is necessary to implement the interrupt.
a) 7.5 b) 6.5 c) 5.5 d) All of the above.
Q50. Resolution of converter determines the degree of accuracy in
conversion. It is equal to____
a) ½ n+1 b) ½ n c)
1/1 n d) 1/n n-1
Q51. D/A converters are classified into three categories according to
their output function.
a) Current voltage b)
Multiplying
c) High accuracy
converter d)
Integrated circuit
Ans. (i)- a,b both (ii)-c,a both (iii)-a, d both
Q52. Check the appropriate answer in the following statements:
(a) A stack is :-
(i)
An 8-bit register in the microprocessor.
(ii)
A 16-bit register in the microprocessor.
(iii)
A
set of memory locations in R/WM reserved for storing information term properly during the execution of a
program.
(iv)
A 16-bit memory address stored in the program
counter.
Q53. The conditional Call and RETURN instructions are based on four data
conditions/flag.
(i) Carry , zero. (ii) Sign and parity (iii) All of the above.
Q54. OS/2 is a 32-bit single user operating system designed by IBM, its
important feature of includes :-
(i) Multitasking (ii)Telecommunications
(iii) Multimedia (iv) All of the above.
Q55. The ______ is a program that allows then user to test and debug the
object file.
(i) Assembler (ii) Loader (iii) Debugger (iv) None of the above.
Q56. It is a program that takes the object file generate by the assembler
program.
(i) Loading (ii) Loader (iii)
Debugger (iv) All of the
above.
Q57. The EI [ Enable interrupt] instruction is used:
(i) RST 7.5 (ii) RST 6.5 (iii)RST 6.5 (iv) All of the above.
Q58. The part of 8255 can be programmed for any other mode by writing a
single control word into the
(i) Port (ii) Control Logic (iii) Set/Reset (iv) Register.
Q59. A stack pointer is :
(i)
A
16-bit register in the microprocessor that indicates the beginning of the stack
memory.
(ii)
A register that decodes and executes 16-bit
arithmetic expression.
(iii)
The first memory location where a subroutine address
is stored.
(iv)
A register in which flag bits are stored.
Q60. When a subroutine is called the address of the instruction following
the call instruction is stored in/one the .
(i) Stack pointer (ii)
Accumulator
(iii) Program counter (iv) Stack
Q61. When the RET instruction at the end of a subroutine is executed.
(i)
The information where the stack is initialized is
transferred to the stack pointer.
(ii)
The memory address of the RET instruction is
transferred to the program counter.
(iii)
Two
data bytes stores in the top two locations of the stack are transferred to the
program counter.
(iv)
Two data bytes stores in the top two locations of
the stack are transferred to the stack pointer.
Q62. Whenever the PO H instruction
is executed.
(i)
Data types in the HL pair are stored on the stack.
(ii)
Two
data bytes at the top of the stack are
transferred to the H L register pair.
(iii)
Two data bytes at the top of the stack are transferred to the program
counter.
Q63. The instruction RST 7 is a :
(i)
The restart instruction that begins the transferred
execution of a program.
(ii)
One-byte
call to the memory address 0038 H.
(iii)
One-byte call to the memory address 0007 H.
(iv)
Hardware interrupt.
Q64. List the four categories of 8085 instructions that manipulate data :
(i) Opcode : MOV and operand
: A,H
(ii) Opcode : MOV and operand
: H,L
(iii) Opcode : MOV and operand
: B,C
(iv) Opcode : MOV and operand
: D,E
Q65. Hex codes for the following instructions, identify the opcodes and
operands and show the order of entering the code in memory.
(i)
Hex code 305220 opcode = STA operands = 2050 H
(ii)
Hex code 305020 opcode = STA operands = 2070 H
(iii)
Hex
code 325020 opcode = STA operands = 2050
H
(iv)
None of the above.
Q66. Load the accumulator A with
the data byte 82H and save the data in register B.
(i) MOV B,A (ii) MVI A, 82 H (iii)
MVI 82 H (iv) MOV BX
Q67. The data copy instruction do not affect the :
(i) Flag (ii) Data (iii) Register
Q68. ______ are used to load data directly or to save data bytes.
(i) Register (ii) Copying (iii) Output part (iv)
Instructions
Q69. A given task should be broken down into small units that can be
built independently this is called the ________
(i) Module design
approach (ii) Modular Design approach.
(iii) Model Design
approach.
Q70. __________ is a program that allows the user to enter, modify and
store a group of instructions or text under a file name.
(i) Editor (ii) Loader (iii) Linker (iv)
None of the above.
ANSWERS
IN OBJECTIVES (TRUE/FALSE)
Q71. A microprocessor is a multipurpose, programmable, clock driven,
register-based electronic device (T/F)
Q72. Read instructions from a storage device called memory. (T/F)
Q73. A typical programmable machine can be represented with 4 component :
microprocessor, memory, Input/Output device, application.
(T/F)
Q74. The physical components of this system are called the hardware. (T/F)
Q75. A set of instructions written for the microprocessor to perform a
task is called an application. (T/F)
Q76. A set of instructions written for the microprocessor to perform a
task is called a program.(T/F)
Q77. The microprocessor applications are classified primarily into 3
categories : re-programmable system and
embedded system. (T/F)
Q78. The first microprocessor was introduced by Intel Corporation in
1971. (T/F)
Q79. 4 bit microprocessor (Intel) introduced were ROCKWELL International
‘s (PPS4). (T/F)
Q80. Intel’s 8086 and 80286, Motorola’s M 68000 and Zilog’s Z8000 are
some of the most powerful-16-bit microprocessor are not available today. (T/F)
Q81. The address bus, the microprocessor transmits the address/memory
location of the device it needs to access. (T/F)
Q82. It is very important to note that the address bus is bi-directional,
the data bus is uni-directional. (T/F)
Q83. It is very important to note that while the address bus is
uni-directional, the data bus is bi-directional. (T/F)
Q84. The microprocessor operates as directed by the user. (T/F)
Q85. The microcomputer operates as directed by the user. (T/F)
Q86. The microprocessor fetches the instructions one by one from the
memory and executes them.
(T/F)
Q87. The processor having been instructed to execute the program, fetches
one instruction at a time from the memory and executes it. (T/F)
Q88. An instruction essentially consists of an operation code also known
as the instruction. (T/F)
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Q90. Instructions can be referred to by abbreviated codes known as
mnemonics. (T/F)
Q91. Microprocessor can decoded and execute only binary coded
instructions. (T/F)
Q92. A microprocessor can understand only machine language program. (T/F)
Q93. The 8085 A commonly known as 8088. (T/F)
Q94. The frequently used machine cycles are Opcode, Fetch, Memory Read
and Write and I/O Read and Write. (T/F)
Q95. The 8085 performs three basic steps in any of these machine cycles :
It places the address on the address bus sends appropriate control signals, and
transfer data via-register. (T/F)
Q96. When the 8085 performs any of the operations, it asserts the
appropriate control signal and status signal. (T/F)
Q97. A latch is commonly used to interface output devices. (T/F)
Q98. The IN instruction is a two-byte instruction. It copies ( transfer
or reads) data from an input port and places the data into the register. (T/F)
Q99. The instruction set is classified in three groups according to the
word size 1,2 or 3 bytes instructions. (T/F)
Q100. The 8085 microprocessor operations are classified into 3 major
groups. (T/F)
Q101. Immediate LXI rp, 16-bit (T/F)
Q102. Indirect MOV R,A (T/F)
Q103. Indirect MVI M, 8-bit (T/F)
Q104. Register CMP M (T/F)
Q105. Indirect CM PM (T/F)
Q106. Immediate CPI, 8-bit (T/F)
Q107. Counters and time delays can be designed using software. (T/F)
Q108. Counters are designed using techniques similar to those used for
time delays. A counter design generally includes a set flags. (T/F)
Q109. 16-bit instructions such as DCX and INX do not affect flags. Some
other techniques must be used to set flag. (T/F)
Q110. A stack pointer register must be initialized at the higher memory
location of the R/W memory. (T/F)
Q111. The (CALL) or conditional call instruction should be used in the
main program accompanied by the RET ( or conditional return) instruction in the
subroutine. (T/F)
Q112. ADCM Add register content
with carry. (T/F)
Q113. ADCR Add register content
with carry. (T/F)
Q114. ACI 8-bit Add immediate 8
bit-data with carry. (T/F)
Q115. SBB 8-bit Subtract register
content with borrow. (T/F)
Q116. SBB M Subtract memory
content with borrow. (T/F)
Q117. SBI 8-bit Subtract immediate
8-bit data with borrow. (T/F)
Q118. Block diagram of the 8254; includes three counter(0,1,2). (T/F)
Q119. This tri-state, 8-bit bi-directional buffer is connected to the
address bus of the MPU.(T/F)
Q120. The 8254 can operate in six different modes. (T/F)
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